Semiconductor Digest: Beating AI Bottlenecks with Better Switches

Semiconductor Digest — April/May 2026

Companies are now considering new ways to build switch matrices for IC testers, using relays built using microelectromechanical systems (MEMS).

SOMETHING CHANGED WHEN WE STARTED measuring computing capacity in gigawatts rather than gigaflops.

As AI models grew in scale, it became clear that raw computing speed was only one part of the story—testing, routing, and infrastructure were emerging as hard limits that the industry had to solve.

The ability of machine-learning strategies, enabled by large language models, to produce behaviors that could be described as artificial intelligence (AI), has prompted huge investments in massive data centers (FIGURE 1).

The scale of these investments is forcing the industry to confront constraints that once seemed secondary.

The interesting question is no longer how fast AI models can scale, but where the supporting infrastructure begins to limit them. Mark Zuckerberg, CEO of Meta, has described the next Meta data center as covering an area equivalent to a “significant part of Manhattan,” underscoring the scale of AI infrastructure. It is not just Meta that is building AI capacity.

According to the Artificial Intelligence Index Report 2025, published by Stanford University’s Human-Centered AI research group, corporate investment in AI was $252.3 billion in 2024, up 25.5% on 2023.

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